General information
Organisation
The French Alternative Energies and Atomic Energy Commission (CEA) is a key player in research, development and innovation in four main areas :
• defence and security,
• nuclear energy (fission and fusion),
• technological research for industry,
• fundamental research in the physical sciences and life sciences.
Drawing on its widely acknowledged expertise, and thanks to its 16000 technicians, engineers, researchers and staff, the CEA actively participates in collaborative projects with a large number of academic and industrial partners.
The CEA is established in ten centers spread throughout France
Reference
2023-27513
Description de l'unité
The researcher will be hosted by the PQC team of CEA, which is a multidisciplinary team that encompasses two departments: SSSEC (Division of Security of Embedded Systems and Components) and DSCIN (Department of Digital Systems and Integrated Circuits).
SSSEC is a division composed of 80 researchers specialized in secure and resilient hardware and software for embedded systems. This hardware Cybersecurity division identifies vulnerabilities in various devices such as integrated circuits, embedded systems or industrial equipment, and, designs innovative protections.
DSCIN is specialized in the design and implementation of innovative hardware and software functions in the field of energy-constrained embedded systems. It addresses the topics of embedded hardware and software cybersecurity, near-sensor mixed-signal design, on-chip communications, and architectures for quantum computing; most often leveraging advanced technological developments.
Position description
Category
Electronics components and equipments
Contract
Fixed-term contract
Job title
Emerging & Secure Hardware Architectures for Post-Quantum Cryptography Applications H/F
Socio-professional category
Executive
Contract duration (months)
60
Job description
Context
Cryptography is at the heart of many secure devices for ensuring confidentiality, integrity and authenticity of communications, programs and data. The security of the current asymmetric cryptography relies on problems that are easy to break with a quantum computer. In practice, the real threat of quantum computing is predicted to be operational in decades. However, through the National Institute of Standards and Technologies (NIST) impulsion, the community decided to move on a stronger cryptography, resilient to attacks from classical and quantum computers. This cryptography is called post-quantum cryptography (also called quantum-safe cryptography or quantum-resistant cryptography).
PQ-TLS is a 5-year research project driven by the French National Research Agency (ANR) and the France 2030 strategy under the frameworks of the Priority Research Programs and Equipments (PEPR).
PQ-TLS aims at developing innovative and efficient hardware implementations of post-quantum cryptography resistant to physical attacks. Indeed, side channel attacks (computation time, energy consumption, electromagnetic radiation) and attacks by perturbation (fault injection) are important threats for embedded devices in scenarios where the attacker can be very close to the device (connected objects, smartphones, transportation, etc.).
Job description
CEA is opening a Junior Research Leader position in Grenoble and in collaboration with the TIMA laboratory to work in the context of the PQ-TLS project. You will be in charge of conducting a research team (made of PhD students and Post-Doc under the direction of both TIMA and CEA researchers) on the development of innovative solutions for the implementation of hardware and secure crypto-accelerators for post-quantum cryptography.
The position is for a duration of 5 years.
The key element of the activity is the study of innovative and secure hardware implementations of post-quantum cryptography. The Grenoble scientific ecosystem can open the possibility to explore also emerging computing paradigms and semiconductor technologies.
You will be integrated in the PQC team of the CEA Grenoble and you will have access to an environment that can offer high-level expertise on e.g., physical attacks, hardware design and fabrication of test chips with advanced semiconductor technologies. A position with high regional (CyberAlps) and national (PEPR PQ-TLS) visibility.
Applicant Profile
5DC05F3493914D61868D718E16499BEF@ts.com
Position location
Site
Grenoble
Job location
France, Auvergne-Rhône-Alpes, Isère (38)
Location
Grenoble
Requester
Position start date
01/09/2023